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@@ -38,12 +38,16 @@ namespace protobuf {
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namespace internal {
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namespace internal {
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inline void MemoryBarrier() {
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inline void MemoryBarrier() {
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- __asm__ __volatile__ ( // NOLINT
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- "dmb ish \n\t" // Data memory barrier.
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- ::: "memory"
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- ); // NOLINT
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+ __asm__ __volatile__ ("dmb ish" ::: "memory"); // NOLINT
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}
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}
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+// NoBarrier versions of the operation include "memory" in the clobber list.
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+// This is not required for direct usage of the NoBarrier versions of the
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+// operations. However this is required for correctness when they are used as
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+// part of the Acquire or Release versions, to ensure that nothing from outside
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+// the call is reordered between the operation and the memory barrier. This does
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+// not change the code generated, so has no or minimal impact on the
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+// NoBarrier operations.
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inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
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inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 old_value,
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@@ -59,13 +63,12 @@ inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
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"stxr %w[temp], %w[new_value], %[ptr] \n\t" // Try to store the new value.
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"stxr %w[temp], %w[new_value], %[ptr] \n\t" // Try to store the new value.
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"cbnz %w[temp], 0b \n\t" // Retry if it did not work.
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"cbnz %w[temp], 0b \n\t" // Retry if it did not work.
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"1: \n\t"
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"1: \n\t"
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- "clrex \n\t" // In case we didn't swap.
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: [prev]"=&r" (prev),
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: [prev]"=&r" (prev),
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[temp]"=&r" (temp),
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[temp]"=&r" (temp),
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[ptr]"+Q" (*ptr)
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[ptr]"+Q" (*ptr)
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- : [old_value]"r" (old_value),
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+ : [old_value]"IJr" (old_value),
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[new_value]"r" (new_value)
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[new_value]"r" (new_value)
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- : "memory", "cc"
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+ : "cc", "memory"
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); // NOLINT
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); // NOLINT
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return prev;
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return prev;
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@@ -105,7 +108,7 @@ inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
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: [result]"=&r" (result),
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: [result]"=&r" (result),
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[temp]"=&r" (temp),
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[temp]"=&r" (temp),
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[ptr]"+Q" (*ptr)
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[ptr]"+Q" (*ptr)
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- : [increment]"r" (increment)
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+ : [increment]"IJr" (increment)
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: "memory"
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: "memory"
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); // NOLINT
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); // NOLINT
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@@ -114,8 +117,10 @@ inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
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inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
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inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
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Atomic32 increment) {
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Atomic32 increment) {
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+ Atomic32 result;
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+
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MemoryBarrier();
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MemoryBarrier();
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- Atomic32 result = NoBarrier_AtomicIncrement(ptr, increment);
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+ result = NoBarrier_AtomicIncrement(ptr, increment);
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MemoryBarrier();
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MemoryBarrier();
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return result;
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return result;
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@@ -125,27 +130,9 @@ inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 old_value,
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Atomic32 new_value) {
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Atomic32 new_value) {
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Atomic32 prev;
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Atomic32 prev;
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- int32_t temp;
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- __asm__ __volatile__ ( // NOLINT
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- "0: \n\t"
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- "ldxr %w[prev], %[ptr] \n\t" // Load the previous value.
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- "cmp %w[prev], %w[old_value] \n\t"
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- "bne 1f \n\t"
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- "stxr %w[temp], %w[new_value], %[ptr] \n\t" // Try to store the new value.
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- "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
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- "dmb ish \n\t" // Data memory barrier.
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- "1: \n\t"
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- // If the compare failed the 'dmb' is unnecessary, but we still need a
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- // 'clrex'.
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- "clrex \n\t"
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- : [prev]"=&r" (prev),
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- [temp]"=&r" (temp),
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- [ptr]"+Q" (*ptr)
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- : [old_value]"r" (old_value),
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- [new_value]"r" (new_value)
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- : "memory", "cc"
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- ); // NOLINT
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+ prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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+ MemoryBarrier();
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return prev;
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return prev;
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}
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}
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@@ -154,27 +141,9 @@ inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 old_value,
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Atomic32 new_value) {
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Atomic32 new_value) {
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Atomic32 prev;
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Atomic32 prev;
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- int32_t temp;
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MemoryBarrier();
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MemoryBarrier();
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-
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- __asm__ __volatile__ ( // NOLINT
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- "0: \n\t"
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- "ldxr %w[prev], %[ptr] \n\t" // Load the previous value.
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- "cmp %w[prev], %w[old_value] \n\t"
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- "bne 1f \n\t"
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- "stxr %w[temp], %w[new_value], %[ptr] \n\t" // Try to store the new value.
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- "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
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- "1: \n\t"
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- // If the compare failed the we still need a 'clrex'.
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- "clrex \n\t"
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- : [prev]"=&r" (prev),
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- [temp]"=&r" (temp),
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- [ptr]"+Q" (*ptr)
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- : [old_value]"r" (old_value),
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- [new_value]"r" (new_value)
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- : "memory", "cc"
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- ); // NOLINT
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+ prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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return prev;
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return prev;
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}
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}
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@@ -189,8 +158,12 @@ inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
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}
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}
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inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
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inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
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- MemoryBarrier();
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- *ptr = value;
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+ __asm__ __volatile__ ( // NOLINT
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+ "stlr %w[value], %[ptr] \n\t"
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+ : [ptr]"=Q" (*ptr)
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+ : [value]"r" (value)
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+ : "memory"
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+ ); // NOLINT
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}
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}
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inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
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inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
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@@ -198,8 +171,15 @@ inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
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}
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}
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inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
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inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
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- Atomic32 value = *ptr;
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- MemoryBarrier();
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+ Atomic32 value;
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+
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+ __asm__ __volatile__ ( // NOLINT
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+ "ldar %w[value], %[ptr] \n\t"
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+ : [value]"=r" (value)
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+ : [ptr]"Q" (*ptr)
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+ : "memory"
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+ ); // NOLINT
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+
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return value;
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return value;
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}
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}
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@@ -225,13 +205,12 @@ inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
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"stxr %w[temp], %[new_value], %[ptr] \n\t"
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"stxr %w[temp], %[new_value], %[ptr] \n\t"
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"cbnz %w[temp], 0b \n\t"
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"cbnz %w[temp], 0b \n\t"
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"1: \n\t"
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"1: \n\t"
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- "clrex \n\t"
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: [prev]"=&r" (prev),
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: [prev]"=&r" (prev),
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[temp]"=&r" (temp),
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[temp]"=&r" (temp),
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[ptr]"+Q" (*ptr)
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[ptr]"+Q" (*ptr)
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- : [old_value]"r" (old_value),
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+ : [old_value]"IJr" (old_value),
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[new_value]"r" (new_value)
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[new_value]"r" (new_value)
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- : "memory", "cc"
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+ : "cc", "memory"
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); // NOLINT
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); // NOLINT
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return prev;
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return prev;
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@@ -271,7 +250,7 @@ inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
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: [result]"=&r" (result),
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: [result]"=&r" (result),
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[temp]"=&r" (temp),
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[temp]"=&r" (temp),
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[ptr]"+Q" (*ptr)
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[ptr]"+Q" (*ptr)
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- : [increment]"r" (increment)
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+ : [increment]"IJr" (increment)
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: "memory"
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: "memory"
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); // NOLINT
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); // NOLINT
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@@ -280,8 +259,10 @@ inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
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inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
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inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
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Atomic64 increment) {
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Atomic64 increment) {
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+ Atomic64 result;
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+
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MemoryBarrier();
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MemoryBarrier();
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- Atomic64 result = NoBarrier_AtomicIncrement(ptr, increment);
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+ result = NoBarrier_AtomicIncrement(ptr, increment);
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MemoryBarrier();
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MemoryBarrier();
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return result;
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return result;
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@@ -291,25 +272,9 @@ inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 old_value,
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Atomic64 new_value) {
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Atomic64 new_value) {
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Atomic64 prev;
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Atomic64 prev;
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- int32_t temp;
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- __asm__ __volatile__ ( // NOLINT
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- "0: \n\t"
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- "ldxr %[prev], %[ptr] \n\t"
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- "cmp %[prev], %[old_value] \n\t"
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- "bne 1f \n\t"
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- "stxr %w[temp], %[new_value], %[ptr] \n\t"
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- "cbnz %w[temp], 0b \n\t"
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- "dmb ish \n\t"
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- "1: \n\t"
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- "clrex \n\t"
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- : [prev]"=&r" (prev),
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- [temp]"=&r" (temp),
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- [ptr]"+Q" (*ptr)
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- : [old_value]"r" (old_value),
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- [new_value]"r" (new_value)
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- : "memory", "cc"
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- ); // NOLINT
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+ prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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+ MemoryBarrier();
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return prev;
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return prev;
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}
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}
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@@ -318,26 +283,9 @@ inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 old_value,
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Atomic64 new_value) {
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Atomic64 new_value) {
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Atomic64 prev;
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Atomic64 prev;
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- int32_t temp;
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MemoryBarrier();
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MemoryBarrier();
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-
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- __asm__ __volatile__ ( // NOLINT
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- "0: \n\t"
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- "ldxr %[prev], %[ptr] \n\t"
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- "cmp %[prev], %[old_value] \n\t"
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- "bne 1f \n\t"
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- "stxr %w[temp], %[new_value], %[ptr] \n\t"
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- "cbnz %w[temp], 0b \n\t"
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- "1: \n\t"
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- "clrex \n\t"
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- : [prev]"=&r" (prev),
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- [temp]"=&r" (temp),
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- [ptr]"+Q" (*ptr)
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- : [old_value]"r" (old_value),
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- [new_value]"r" (new_value)
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- : "memory", "cc"
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- ); // NOLINT
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+ prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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return prev;
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return prev;
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}
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}
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@@ -352,8 +300,12 @@ inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
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}
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}
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inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
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inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
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- MemoryBarrier();
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- *ptr = value;
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+ __asm__ __volatile__ ( // NOLINT
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+ "stlr %x[value], %[ptr] \n\t"
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+ : [ptr]"=Q" (*ptr)
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+ : [value]"r" (value)
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+ : "memory"
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+ ); // NOLINT
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}
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}
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inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
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inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
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@@ -361,8 +313,15 @@ inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
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}
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}
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inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
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inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
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- Atomic64 value = *ptr;
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- MemoryBarrier();
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+ Atomic32 value;
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+
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+ __asm__ __volatile__ ( // NOLINT
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+ "ldar %x[value], %[ptr] \n\t"
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+ : [value]"=r" (value)
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+ : [ptr]"Q" (*ptr)
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+ : "memory"
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+ ); // NOLINT
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+
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return value;
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return value;
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}
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}
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